1. Field of the Invention
The present invention relates to a semiconductor device, and relates particularly to the electrode arrangement of a ball grid array (BGA), chip scale package (CSP), or other multiple pin, surface mounting package in which solder balls are used as the external electrodes by which connection to an external circuitry is achieved.
2. Description of the Related Art
Manufacturers of memory chips and application-specific IC (ASIC) devices have not been able to meet the demand for faster assembly, an increase in the number of pins, and continual reduction in chip size using the quad flat package and other conventional package designs in which pins are used for the external electrodes. This situation led to the development of BGA, CSP, and other surface mounting technologies in which solder balls are used for external electrodes, thereby also achieving thinner, smaller packages with a large number of external electrodes. Size is reduced and a large number of external electrodes is achieved in these packages by reducing the pitch between the solder balls functioning as external electrodes to less than 1 mm.
FIG. 7 is a plan view of the mounting surface of a conventional semiconductor device as described above. This semiconductor device 100 comprises a package 101 with a mounting surface 102 on which are formed solder balls constituting a plurality of external electrodes. Note that, as shown in FIG. 7, the solder balls formed on the mounting surface 102 include a plurality of solder balls 103a used as a power supply terminal, a plurality of solder balls 103b used as a ground terminal, and a plurality of solder balls 103c, that is, the solder balls other than the power supply terminal and ground terminal solder balls, used as signal electrodes.
When the distance between adjacent solder balls is less than 1 mm with this arrangement, solder shorting and shorting between electrodes caused by fixed or unfixed foreign matter can occur easily during the mounting process. Unlike with QFP and other types of pin packages, such shorting cannot be detected by naked eye observations or probing in BGA, CSP, and other types of surface mounting packages. Boundary scanning has therefore been used as one method of detecting defective connections and electrode shorting in BGA, CSP, and other types of surface mounting packages.
Boundary scanning can electrically detect shorts involving signal electrodes, that is, the external electrodes other than the power supply and ground electrodes. More specifically, boundary scanning can electrically detect shorting between signal electrodes, between a signal electrode and a power supply electrode, and between a signal electrode and ground electrode. Boundary scanning cannot, however, detect shorting between a power supply electrode and ground electrode. This is a particular problem when, for example, a plurality of solder balls 103a used as power supply terminals, and a plurality of solder balls 103b used as ground terminals, are arranged as shown in FIG. 7 with a solder ball pitch of 1 mm or less because this arrangement and electrode proximity can easily result in shorting between a power supply electrode and ground electrode due to solder debris and other foreign matter.
It should be noted that while its object differs from that of the present invention, a semiconductor device disclosed in Japanese Patent Laid-Open Publication No. 6-151688 (1994-151688) teaches the use of a lead for external electrodes as a means of preventing transistor misoperation by suppressing the change in power supply potential and ground potential as a result of disposing two signal leads between a power supply lead and a ground lead.